Axis 1: Design of mixed architectures
The research activities developed in this area concern the study, design and implementation of digital systems within mixed components. The main objective of this work is to relax the design constraints in the analog domain, constraints linked to the speed-accuracy compromise.
Axis 2: Design of dedicated architectures
The study, design and implementation of digital functions to be integrated within System-on-Chip is the central theme of axis 2. The main objective of this work is to propose efficient architectures in terms of complexity and throughput while respecting application constraints.
Axis 3: Implementation on software architectures
Instruction set architectures are currently omnipresent in Systems on Chip. They are now multi-core or even many-core. These processor cores are said to be flexible if they allow the designer to make some architectural adaptations. We exploit these instruction set architectures for the efficient implementation of highly constrained functionalities.
The application areas addressed by the CSN team are:
- Digital communications (error correcting codes and iterative receivers)
- Multimedia applications
- Radio communications
- Reliability of electronic systems
- Radar
