Houssem REZGUI

Postdoctoral Researcher

Research group : CIRCUIT DESIGN

Team : M4C

Tel : 0540006540

Read more

Article (5)

Nanoscale Thermal Transport in Vertical Gateall-around Junction-less Nanowire Transistors-Part II: Multiphysics Simulation Auteur(s): H. Rezgui, Mukherjee Chhandak, Y. Wang, M. Deng, A. Kumar, J. Müller, G. Larrieu, C. Maneux Lien HAL : https://hal.science/hal-04296531 Evidence of trapping and electrothermal effects in vertical junctionless nanowire transistors Auteur(s): Y. Wang, Mukherjee Chhandak, H. Rezgui, M. Deng, Jonas Müller, S. Pelloquin, Guilhem Larrieu, C. Maneux Lien HAL : https://hal.science/hal-04297709 Strategies for Characterization and Parameter Extraction of Vertical Junction-Less Nanowire FETs Dedicated to Design Technology Co-Optimization Auteur(s): Cristell Maneux, Chhandak Mukherjee, Marina Deng, Guilhem Larrieu, Yifang Wang, Bruno Wesling, Houssem Rezgui Lien HAL : https://hal.science/hal-04230924 Nanoscale Thermal Transport in Vertical Gate-All-Around Junctionless Nanowire Transistors—Part I: Experimental Methods Auteur(s): Mukherjee Chhandak, H. Rezgui, Y. Wang, M. Deng, A. Kumar, Jonas Müller, G. Larrieu, C. Maneux Lien HAL : https://hal.science/hal-04296517 3D Logic circuit design oriented electrothermal modeling of vertical junctionless nanowire FETs Auteur(s): Sara Mannaa, Arnaud Poittevin, Cédric Marchand, Damien Deleruyelle, Bastien Deveautour, Alberto Bosio, Ian O’connor, Chhandak Mukherjee, Yifan Wang, Houssem Rezgui, Marina Deng, Cristell Maneux, Jonas Müller, Sylvain Pelloquin, Konstantinos Moustakas, Guilhem Larrieu Lien HAL : https://hal.science/hal-04230911

Send a email to Houssem REZGUI :

    Contact our team

    If you have a request or questions about the laboratory, please contact our team.