François MARC

Associate Professor

Research group : CIRCUIT DESIGN

Team : M4C

Tel : 0540002833

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Article (27)

Development of a high accuracy and stability test bench for ageing measurement of 16 nm FinFETs based FPGA Auteur(s): Justin Sobas, Tudor-Bogdan Airimitoaie, François Marc Lien HAL : https://hal.science/hal-04017664 A physical and versatile aging compact model for hot carrier degradation in SiGe HBTs under dynamic operating conditions Auteur(s): C. Mukherjee, F. Marc, M. Couret, G.G. Fischer, M. Jaoul, D. Céli, K. Aufinger, T. Zimmer, C. Maneux Lien HAL : https://hal.science/hal-02475429 Scalable compact modeling of trap generation near the EB spacer oxide interface in SiGe HBTs Auteur(s): Marine Couret, Mathieu Jaoul, François Marc, Chhandak Mukherjee, Didier Celi, Thomas Zimmer, Cristell Maneux Lien HAL : https://hal.science/hal-02541991 Simulation and modelling of long term reliability of digital circuits implemented in FPGA Auteur(s): J.D. Aguirre Morales, F. Marc, A. Bensoussan, A. Durier Lien HAL : https://hal.science/hal-01946442 Proceedings of the 28th European Symposium on the reliability of electron devices, failure physics and analysis Auteur(s): Nathalie Labat, François Marc, Helene Frémont, Marise Bafleur Lien HAL : https://hal.science/hal-01660958 Design and implementation of a low cost test bench to assess the reliability of FPGA Auteur(s): Mohammad Naouss, F. Marc Lien HAL : https://hal.science/hal-01661808 Reliability-Aware Circuit Design Methodology for Beyond-5G Communication Systems Auteur(s): Chhandak Mukherjee, Bertrand Ardouin, Jean-Yves Dupuy, Virginie Nodjiadjim, Muriel Riet, Thomas Zimmer, François Marc, Cristell Maneux Lien HAL : https://hal.science/hal-01670929 Multiscaled simulation methodology for neuro-inspired circuits demonstrated with an organic memristor Auteur(s): Christopher Bennett, Jean-Etienne Lorival, François Marc, Théo Cabaret, Bruno Jousselme, Vincent Derycke, Jacques-Olivier Klein, Cristell Maneux Lien HAL : https://cea.hal.science/cea-01656702 FPGA LUT delay degradation due to HCI: Experiment and simulation results Auteur(s): Mohammad Naouss, F. Marc Lien HAL : https://hal.science/hal-01661820 Editorial, Microelectronics Reliability, Volume 55, Issues 9–10, August–September 2015 Auteur(s): Marise Bafleur, Philippe Perdu, François Marc, Hélène Frémont, Nicolas Nolhier Lien HAL : https://hal.science/hal-01257965 On the Simulation of HCI-Induced Variations of IC Timings at High Level Auteur(s): Olivier Héron, Clément Bertolini, Nicolas Ventroux, Chiara Sandionigi, François Marc Lien HAL : https://hal.science/hal-00950233 Submicrometer InP/InGaAs DHBT Architecture Enhancements Targeting Reliability Improvements Auteur(s): Gilles Amadou Koné, Brice Grandchamp, Cyril Hainaut, François Marc, Nathalie Labat, Thomas Zimmer, Virginie Nodjiadjim, Muriel Riet, Jean-Yves Dupuy, Jean Godin, Cristell Maneux Lien HAL : https://hal.science/hal-00909053 Investigation of the degradation mechanisms of InP/InGaAs DHBT under bias stress conditions to achieve electrical aging model for circuit design Auteur(s): S. Ghosh, B. Grandchamp, G.A Koné, F. Marc, C. Maneux, T. Zimmer, V. Nodjiadjim, M. Riet, J.-Y. Dupuy, J. Godin Lien HAL : https://hal.science/hal-00671676 Impact of Power Consumption and Temperature on Processor Lifetime Reliability Auteur(s): Tushar Gupta, Clément Bertolini, Olivier Héron, Nicolas Ventroux, Thomas Zimmer, François Marc Lien HAL : https://hal.science/hal-00674305 Thermal aging model of InP/InGaAs/InP DHBT Auteur(s): S. Gosh, François Marc, Cristell Maneux, Brice Grandchamp, Gilles Amadou Koné, Thomas Zimmer Lien HAL : https://hal.science/hal-00674295 Reliability of submicron InGaAs/InP DHBT under thermal and electrical stresses Auteur(s): G. A. Koné, B. Grandchamp, C. Hainaut, F. Marc, C. Maneux, N. Labat, T. Zimmer, V. Nodjiadjim, M. Riet, J. Godin Lien HAL : https://hal.science/hal-00670550 Preliminary results of storage accelerated aging test on InP/InGaAs DHBT Auteur(s): Gilles Amadou Koné, Brice Grandchamp, Cyril Hainaut, François Marc, Cristell Maneux, Nathalie Labat, V. Nodjiadjim, J. Godin Lien HAL : https://hal.science/hal-00585073 Multilevel behavioural modelling for reliability analysis of ionizing dose effects on a n-MOS simple current mirror Auteur(s): Corinne Bestory, François Marc, Sophie Duzellier, Hervé Lévi Lien HAL : https://hal.science/hal-00499470 Functionnal localization in integrated circuits by Signal Selective Voltage Contrast in a scanning electron microscope Auteur(s): François Marc, Hélène Frémont, Paul Jounet, Yves Danto, Michel Barré Lien HAL : https://hal.science/hal-00326620 Statistical analysis during the reliability simulation Auteur(s): Corinne Bestory, François Marc, Hervé Lévi Lien HAL : https://hal.science/hal-00326542 Reliability of Low-Cost PCB Interconnections for Telecommunication Applications Auteur(s): Geneviève Duchamp, Frédéric Verdier, Yannick Deshayes, François Marc, Yves Ousten, Yves Danto Lien HAL : https://hal.science/hal-00181802 Quick and exhaustive descrambling methodology for high density static random access memories using voltage contrast Auteur(s): François Marc, Hélène Fremont, Paul Jounet, Yves Danto Lien HAL : https://hal.science/hal-00181886 Ultrasonic images interpretation improvement for microassembling technologies characterization Auteur(s): L. Bechou, B. Tregon, Y. Ousten, F. Marc, Y. Danto, Ph. Kertesz, R. Even Lien HAL : https://hal.science/hal-00164920 Contribution to ageing simulation of complex analogue circuit using VHDL-AMS behavioural modelling language Auteur(s): Benoit Mongellaz, François Marc, Noëlle Lewis, Yves Danto Lien HAL : https://hal.science/hal-00181804 Improvement of Aging Simulation of Electronic Circuits Using Behavioral Modeling Auteur(s): François Marc, Benoit Mongellaz, Corinne Bestory, Herve Levi, Yves Danto Lien HAL : https://hal.science/hal-00181801 A general methodology using an electron beam tester applied to failure localization inside a logic integrated circuit Auteur(s): François Marc, Hélène Fremont, Paul Jounet, M. Barre, Yves Danto Lien HAL : https://hal.science/hal-00181885 Ageing simulation of MOSFET circuit using a VHDL-AMS behavioural modelling: An experimental case study Auteur(s): Benoit Mongellaz, François Marc, Yves Danto Lien HAL : https://hal.science/hal-00181803

Conference proceedings (40)

Analysis of an Inverter Logic Cell based on 3D Vertical NanoWire Junction-Less Transistors Auteur(s): Lucas Réveil, Mukherjee Chhandak, Cristell Maneux, Marina Deng, François Marc, Abhishek Kumar, Guilhem Larrieu, Arnaud Poittevin, Ian O'Connor, Oskar Baumgartner, David Pirker Lien HAL : https://hal.science/hal-03765079 3D logic cells design and results based on Vertical NWFET technology including tied compact model Auteur(s): Mukherjee Chhandak, Marina Deng, François Marc, Cristell Maneux, Arnaud Poittevin, Ian O'Connor, Sébastien Le Beux, Cédric Marchand, Abhishek Kumar, Aurélie Lecestre, Guilhem Larrieu Lien HAL : https://hal.science/hal-03166674 Impact of SiGe HBT hot-carrier degradation on the broadband amplifier output supply current Auteur(s): Marine Couret, Gerhard Fischer, Iria Garcia-Lopez, Magali de Matos, François Marc, Cristell Maneux Lien HAL : https://hal.science/hal-02379120 Modelling delay degradation due to NBTI in FPGA Look-up tables Auteur(s): Mohammad Naouss, François Marc Lien HAL : https://hal.science/hal-01661828 Thermal aging model of InP/InGaAs/InP DHBT Auteur(s): S. Ghosh, F. Marc, C. Maneux, B. Grandchamp, G. A. Koné, T. Zimmer Lien HAL : https://hal.science/hal-01002465 Investigation of the degradation mechanisms of InP/InGaAs DHBT under bias stress conditions to achieve electrical aging model for circuit design Auteur(s): S. Ghosh, B. Grandchamp, G. A. Koné, F. Marc, C. Maneux, T. Zimmer, V. Nodjiadjim, M. Riet, J. Y. Dupuy, J. Godin Lien HAL : https://hal.science/hal-01002192 Reliability of submicron InGaAs/InP DHBT on Accelerated Aging Tests under Thermal and Electrical stresses Auteur(s): G. A. Koné, B. Grandchamp, C. Hainaut, F. Marc, C. Maneux, N. Labat, T. Zimmer, V. Nodjiadjim, M. Riet, J. Godin Lien HAL : https://hal.science/hal-01002459 Effects of various applications on relative lifetime of processor cores Auteur(s): Tushar Gupta, Clément Bertolini, Olivier Héron, Nicolas Ventroux, T. Zimmer, F. Marc Lien HAL : https://hal.science/hal-00674313 High Level Power and Energy Exploration Using ArchC Auteur(s): Tushar Gupta, Clément Bertolini, Olivier Héron, Nicolas Ventroux, Thomas Zimmer, François Marc Lien HAL : https://hal.science/hal-00674311 System Level Analysis and Accurate Prediction of Electromigration Auteur(s): Tushar Gupta, Clément Bertolini, Olivier Héron, Nicolas Ventroux, Thomas Zimmer, François Marc Lien HAL : https://hal.science/hal-00674319 Reliability Aware ArchC based Processor Simulator Auteur(s): Tushar Gupta, Clément Bertolini, Olivier Héron, Nicolas Ventroux, Thomas Zimmer, François Marc Lien HAL : https://hal.science/hal-00674316 Predicting Lifetime using power consumption from 'Wattch Auteur(s): Tushar Gupta, Clément Bertolini, Olivier Héron, Nicolas Ventroux, Thomas Zimmer, François Marc Lien HAL : https://hal.science/hal-00674317 Preliminary results of storage accelerated aging test on InP/GaAsSb DHBT Auteur(s): Gilles Amadou Kone, S. Ghosh, Brice Grandchamp, Cristell Maneux, François Marc, Nathalie Labat, Thomas Zimmer, H. Maher, M.L. Bourqui, D. Smith Lien HAL : https://hal.science/hal-00585590 Effects of Power consumption and Temperature on Lifetime Reliability of ArchC based Processor Architecture Auteur(s): Tushar Gupta, Clément Bertolini, Olivier Héron, Nicolas Ventroux, Thomas Zimmer, François Marc Lien HAL : https://hal.science/hal-00499484 Effects of various applications on relative lifetime of processor cores Auteur(s): Tushar Gupta, Olivier Héron, Thomas Zimmer, Nicolas Ventroux, François Marc, Clément Bertolini Lien HAL : https://hal.science/hal-00499480 Benchmarking of HBT Models for InP Based DHBT Modeling Auteur(s): S. Ghosh, T. Zimmer, B. Ardouin, C. Maneux, S. Frégonèse, F. Marc, B. Grandchamp, G.A. Koné Lien HAL : https://hal.science/hal-00488687 Conception fiabilisée pour les circuits à nanodispositifs Auteur(s): François Marc Lien HAL : https://hal.science/hal-00499488 Approche statistique de la fiabilité : application à la fiabilité des systèmes et aux mécanismes d'usure Auteur(s): François Marc Lien HAL : https://hal.science/hal-00326601 Prévision du vieillissement des composants en utilisation et de l'effet sur l'évolution paramétrique des fonctions analogiques Auteur(s): François Marc, Corinne Bestory, Hervé Lévi Lien HAL : https://hal.science/hal-00326618 First steps toward ageing simulation of complex analogue circuits with behaioural modelling Auteur(s): François Marc, Yves Danto Lien HAL : https://hal.science/hal-00181896 Reliability simulation of electronic circuits with VHDL- AMS Auteur(s): François Marc, Benoit Mongellaz, Yves Danto Lien HAL : https://hal.science/hal-00181903 Genetic Algorithm Optimisation for Evanescent Mode Waveguide Filter Design Auteur(s): Marc Lecouve, Pierre Jarry, Eric Kerherve, Nicolas Boutheiller, François Marc Lien HAL : https://hal.science/hal-00181906 A fast VLSI SRAM mapping methodology using voltage contrast techniques on SEM Auteur(s): François Marc, Hélène Fremont, Paul Jounet, Andre Touboul, Yves Danto Lien HAL : https://hal.science/hal-00181911 Prévision de l'impact du vieillissement des composants sur le comportement des circuits Auteur(s): François Marc, Benoit Mongellaz, Yves Danto Lien HAL : https://hal.science/hal-00181919 Improvement of ageing simulation of electronic circuits based on behavioural modelling Auteur(s): François Marc, Benoit Mongellaz, Corinne Bestory, Herve Levi, Yves Danto Lien HAL : https://hal.science/hal-00181897 Modèle Comportemental VHDL-AMS d'un Amplificateur CMOS à Transconductance: Application à la conception de filtres Auteur(s): Benoit Mongellaz, Anne Schmitt, Noëlle Lewis, François Marc, Yves Danto Lien HAL : https://hal.science/hal-00181901 approach of integrated circuits failure location by voltage contrast in a scanning electron microscope Auteur(s): François Marc, Hélène Fremont, Paul Jounet, Yves Danto, M. Barre, C. Nouet Lien HAL : https://hal.science/hal-00181909 Méthodologie de test sans contact Auteur(s): François Marc Lien HAL : https://hal.science/hal-00181921 Study of Degradations in PCB Interconnections for High Frequency Applications Auteur(s): Geneviève Duchamp, Frédéric Verdier, Bruno Levrier, François Marc, Yves Ousten, Yves Danto Lien HAL : https://hal.science/hal-00181898 Modélisation comportementale de la fiabilité des circuits intégrés complexes Auteur(s): François Marc, Benoit Mongellaz, Yves Danto Lien HAL : https://hal.science/hal-00181918 La simulation de l'usure des circuits intégrés analogique : prise en compte de l'interaction fonction, profil de misssion, circuit Auteur(s): François Marc, Corinne Bestory, Herve Levi, Yves Danto Lien HAL : https://hal.science/hal-00181894 Multi-level Modeling of hot carrier injection for reliability simulation using VHDL-AMS Auteur(s): Corinne Bestory, François Marc, Herve Levi, Yves Danto Lien HAL : https://hal.science/hal-00181895 Modélisation comportementale et fiabilité des systèmes Auteur(s): François Marc, Benoit Mongellaz, Yves Danto Lien HAL : https://hal.science/hal-00181902 Ultrasonic images interpretation improvement for microassembling technologies characterization Auteur(s): Laurent Bechou, Yves Ousten, Bernard Tregon, François Marc, Yves Danto, Philippe Kertesz Lien HAL : https://hal.science/hal-00181907 Les besoins du test interne pour la localisation de défauts Auteur(s): François Marc Lien HAL : https://hal.science/hal-00181908 A CMOS Analogue Function VHDL-AMS Behavioral Ageing Model Auteur(s): Benoit Mongellaz, François Marc, Corinne Bestory, Yves Danto Lien HAL : https://hal.science/hal-00181899 Algorithme génétique adapté à la conception d'un filtre en guide d'ondes à modes évanescents Auteur(s): Marc Lecouve, Nicolas Boutheiller, Pierre Jarry, Eric Kerherve, François Marc Lien HAL : https://hal.science/hal-00181904 CAD of evanescent mode waveguide filter with genetic algorithm optimization Auteur(s): Marc Lecouve, Nicolas Boutheiller, Pierre Jarry, Eric Kerherve, François Marc Lien HAL : https://hal.science/hal-00181905 Critères de choix des méthodes et des techniques Auteur(s): M. Barre, François Marc Lien HAL : https://hal.science/hal-00181920 CMOS transistor electrical ageing experiments to build VHDL-AMS behavioral models Auteur(s): Benoit Mongellaz, François Marc, Yves Danto Lien HAL : https://hal.science/hal-00181900

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