Conference proceedings (3)
A 860mV and 73.5Ppm/°C Voltage Reference that Relies on Back-Gate Biasing Techniques in 28nm FD-SOI Technology Auteur(s): Maxime Guillot, Yann Deval, Herve Lapuyade, François Rivet Lien HAL : https://hal.science/hal-04945900v1 Temperature Compensation in FD-SOI Transistors: A Novel Approach with 27% Performance Improvement via Parasitic Diode Biasing Auteur(s): Maxime Guillot, Yann Deval, Herve Lapuyade, Francois Rivet Lien HAL : https://hal.science/hal-04790652v1 A Zero Temperature Coefficient Voltage Reference, Stability and Versatility using 28nm FD-SOI Technology Auteur(s): Maxime Guillot, Yann Deval, Herve Lapuyade, Kawori Sekine, Kazuyuki Wada, Francois Rivet Lien HAL : https://hal.science/hal-04218085v1Send a email to Maxime GUILLOT :
