The 5th Generation (5G) of communications offers very high data rates by using multiple carrier frequencies simultaneously in the 617 MHz to 5 GHz band. The main challenge is to achieve intelligent carrier aggregation without increasing power consumption, while considering the constraints of multi-standard operation, resolution, speed, and integration. This work presents research results related to the design of wideband power amplifiers in 28 nm FD-SOI CMOS technology for 5G FR1 bands. Harmonic control methods are investigated to optimize the efficiency of the amplifiers over a wide bandwidth. The design approaches leading to these architectures, the implemented circuits, and the obtained measurement results are presented and discussed.



